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197 lines
4.9 KiB
C
197 lines
4.9 KiB
C
/*
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Vendor Reset - Vendor Specific Reset
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Copyright (C) 2020 Geoffrey McRae <geoff@hostfission.com>
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This program is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free Software
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Foundation; either version 2 of the License, or (at your option) any later
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version.
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This program is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A
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PARTICULAR PURPOSE. See the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc., 59 Temple
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Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "vendor-reset-dev.h"
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#include <linux/delay.h>
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#include "nbio_7_4_offset.h"
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#include "nbio_7_4_sh_mask.h"
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#include "thm_11_0_2_offset.h"
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#include "thm_11_0_2_sh_mask.h"
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#include "mp_9_0_offset.h"
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#include "mp_9_0_sh_mask.h"
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#include "hdp_4_0_offset.h"
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#include "hdp_4_0_sh_mask.h"
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#include "common.h"
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#include "soc15.h"
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#include "soc15_common.h"
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#include "common_baco.h"
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#include "vega20_ppsmc.h"
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#include "psp_gfx_if.h"
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static const struct soc15_baco_cmd_entry clean_baco_tbl[] =
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{
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{CMD_WRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIOS_SCRATCH_6), 0, 0, 0, 0},
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{CMD_WRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIOS_SCRATCH_7), 0, 0, 0, 0},
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};
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extern int vega20_reg_base_init(struct amd_fake_dev *adev);
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static int vega20_baco_get_state(struct amd_fake_dev *adev, enum BACO_STATE *state)
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{
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uint32_t reg = RREG32_SOC15(NBIF, 0, mmBACO_CNTL);
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if (reg & BACO_CNTL__BACO_MODE_MASK)
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/* gfx has already entered BACO state */
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*state = BACO_STATE_IN;
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else
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*state = BACO_STATE_OUT;
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return 0;
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}
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static int vega20_baco_set_state(struct amd_fake_dev *adev, enum BACO_STATE state)
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{
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enum BACO_STATE cur_state;
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uint32_t data;
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vega20_baco_get_state(adev, &cur_state);
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if (cur_state == state)
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return 0;
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if (state == BACO_STATE_IN)
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{
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data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL);
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data |= 0x80000000;
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WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data);
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if (smum_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_EnterBaco, 0, NULL))
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return -EINVAL;
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}
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else
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{
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if (smum_send_msg_to_smc(adev, PPSMC_MSG_ExitBaco, NULL))
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return -EINVAL;
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if (!soc15_baco_program_registers(adev, clean_baco_tbl,
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ARRAY_SIZE(clean_baco_tbl)))
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return -EINVAL;
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}
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return 0;
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}
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static int amd_vega20_mode1_reset(struct amd_fake_dev *adev)
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{
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int ret;
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uint32_t offset;
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offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64);
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ret = psp_wait_for(adev, offset, 0x80000000, 0x8000FFFF, false);
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if (ret)
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{
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pci_warn(adev->pdev, "vega20: psp not working for mode1 reset\n");
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return ret;
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}
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WREG32(offset, GFX_CTRL_CMD_ID_MODE1_RST);
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msleep(500);
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offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_33);
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ret = psp_wait_for(adev, offset, 0x80000000, 0x80000000, false);
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if (ret)
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{
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pci_warn(adev->pdev, "vega20: psp mode1 reset failed\n");
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return ret;
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}
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pci_info(adev->pdev, "vega20: psp mode1 reset succeeded\n");
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return ret;
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}
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static int amd_vega20_reset(struct vendor_reset_dev *dev)
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{
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struct amd_vendor_private *priv = amd_private(dev);
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struct amd_fake_dev *adev;
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int ret = 0, timeout;
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u32 sol;
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enum BACO_STATE baco_state;
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adev = &priv->adev;
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ret = amd_fake_dev_init(adev, dev);
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if (ret)
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return ret;
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ret = vega20_reg_base_init(&priv->adev);
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if (ret)
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goto free_adev;
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/* it's important we wait for the SOC to be ready */
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for (timeout = 100000; timeout; --timeout)
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{
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sol = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81);
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if (sol != 0xFFFFFFFF && sol != 0)
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break;
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udelay(1);
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}
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vega20_baco_get_state(adev, &baco_state);
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if (sol == ~1L && baco_state != BACO_STATE_IN)
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{
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pci_warn(dev->pdev, "vega20: Timed out waiting for SOL to be valid\n");
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ret = -EINVAL;
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goto free_adev;
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}
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/* if there's no sign of life we usually can't reset */
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if (!sol)
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{
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pci_info(dev->pdev, "vega20: no SOL, not attempting BACO reset\n");
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goto free_adev;
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}
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/* first try a mode1 psp reset */
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amdgpu_atombios_scratch_regs_engine_hung(adev, true);
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ret = amd_vega20_mode1_reset(adev);
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if (!ret)
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{
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amdgpu_atombios_scratch_regs_engine_hung(adev, false);
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goto free_adev;
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}
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pci_info(dev->pdev, "vega20: falling back to BACO reset\n");
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ret = vega20_baco_set_state(adev, BACO_STATE_IN);
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if (ret)
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{
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pci_warn(dev->pdev, "vega20: enter BACO failed\n");
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goto free_adev;
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}
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ret = vega20_baco_set_state(adev, BACO_STATE_OUT);
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if (ret)
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{
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pci_warn(dev->pdev, "vega20: exit BACO failed\n");
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goto free_adev;
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}
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pci_info(dev->pdev, "vega20: BACO reset successful\n");
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free_adev:
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amd_fake_dev_fini(adev);
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return ret;
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}
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const struct vendor_reset_ops amd_vega20_ops =
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{
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.pre_reset = amd_common_pre_reset,
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.reset = amd_vega20_reset,
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.post_reset = amd_common_post_reset,
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};
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